A flexible framework for communication evaluation in SoC design

— We present SoCExplore, a framework for fast communicationcentric design space exploration of complex SoCs with networkbased interconnects. Speed-up in exploration is achieved through ion of computation as a high-level trace, and accuracy is maintained through cycle-accurate interconnect simulation. The flexibility offered allows for fast partition/mapping and interconnect design space exploration. Error analysis of such frameworks is non-trivial and is presented for the first time. As a case study, a speed-up of 94% over architectural simulation is reported for the MPEG application.

• Type: Conference
• Year: 2005
• Where: ASPDAC
• Authors: Praveen Kalla, Xiaobo Sharon Hu, Jörg Henkel
• Keywords: ASPDAC 2005, Cycle-accurate Interconnect Simulation, Design Space Exploration, Fast Communicationcentric Design, Hardware