Forensic engineering techniques for VLSI CAD tools

The proliferation of the Internet has a ected the business model of almost all semiconductor and VLSI CAD companies that rely on intellectual property (IP) as their main source of revenues. The fact that IP has become more accessible and easily transferable, has in uenced the emergence of copyright infringement as one of the most common obstructions to e-commerce of IP. In this paper, we propose a generic forensic engineering technique that addresses a numberof copyright infringement scenarios. Given a solution SP to a particular optimization problem instance P and a nite set of algorithms A applicable to P, the goal is to identify with a certain degree of con dence the algorithm Ai which has been applied to P in order to obtain SP. We have applied forensic analysis principles to two problem instances commonly encountered in VLSI CAD: graph coloring and boolean satis ability. We have demonstrated that solutions produced by strategically di erent algorithms can be associated with their...

• Type: Conference
• Year: 2000
• Where: DAC
• Authors: Darko Kirovski, David T. Liu, Jennifer L. Wong, Miodrag Potkonjak
• Keywords: Boolean Satis Ability, Copyright Infringement Scenarios, DAC 2000, Design Automation, VLSI CAD Companies