An FPGA-Based Array Processor for an Ionospheric-Imaging Radar

Atmospheric scientists need to observe fluctuations in the ionosphere, both to probe the underlying atmospheric physics, and to remove the effects of these fluctuations from other measurements. We have built an FPGA-based, pipelined array processor that allows us to make these observations in real-time, using passive radar techniques. Our array processor time-multiplexes 16 multiply–accumulators across 1536 radar ranges, performing a pipelined correlation and integration of the radar signal for each range. A DSP-based postprocessor generates realtime range-Doppler profiles of the ionospheric targets.

• Type: Conference
• Year: 2000
• Where: FCCM
• Authors: Tim Tuan, Miguel Figueroa, Frank Lind, Chucai Zhou, Chris Diorio, John Sahr
• Keywords: Array Processor, Array Processor Time-multiplexes, FCCM 2000, Passive Radar Techniques, VLSI