FPGA-Based CDMA Switch for Networks-on-Chip

This paper presents timing and area results for an FPGA implementation of a CDMA-based switch for networkson-chip. The design was mapped onto the Xilinx Virtex4 XC4VLX200 device using Synplify Pro for a range of payload sizes. The synthesis results give the area and maximum frequency obtained. Simulation verifies the desired functionality and provides throughput and latency values as functions of payload size.

• Type: Conference
• Year: 2005
• Where: FCCM
• Authors: Daewook Kim, Manho Kim, Gerald E. Sobelman
• Keywords: FCCM 2005, FPGA Implementation, Hardware, Paper Presents Timing, Payload Size