FPGA Vendor Agnostic True Random Number Generator

This paper describes a solution for the generation of true random numbers in a purely digital fashion; making it suitable for any FPGA type, because no FPGA vendor specific features (e.g., like phase-locked loop) or external analog components are required. Our solution is based on a framework for a provable secure true random number generator recently proposed by Sunar, Martin and Stinson. It uses a large amount of ring oscillators with identical ring lengths as a fast noise source

• Type: Conference
• Year: 2006
• Where: FPL
• Authors: Dries Schellekens, Bart Preneel, Ingrid Verbauwhede
• Keywords: FPL 2006, Hardware, Ring Oscillators, True Random Number, True Random Number Generators