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IEEEPACT
1999
IEEE

A Fully Asynchronous Superscalar Architecture

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A Fully Asynchronous Superscalar Architecture
An asynchronous superscalar architecture is presented based on a novel architectural feature called instruction compounding. This enables efficient dynamic scheduling and forwarding of data based on local information, while maintaining the advantages of asynchrony in terms of exploiting actual delays. Results are presented in which statically and dynamically compounded architectures are compared against an equivalent synchronous superscalar architecture.
D. K. Arvind, Robert D. Mullins
Added 03 Aug 2010
Updated 03 Aug 2010
Type Conference
Year 1999
Where IEEEPACT
Authors D. K. Arvind, Robert D. Mullins
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