Generating compilers for generated datapaths

Modern CAD systems allow the designers to come up with powerful programmable datapaths in avery short time. The time to develop compilers for this datapaths is much longer. This paper presents a new approach to compiler generation. We show how a VHDL description of a programmable datapath can be analyzed to extract several informations for compiler generation. The analysis finds computing and storage resources, classifies signals as control or data, and extracts all the possible micro operations for this datapath.

• Type: Conference
• Year: 1994
• Where: EURODAC
• Authors: Michael Held, Manfred Glesner
• Keywords: Compiler Generation, EURODAC 1994, Powerful Programmable Datapaths, Programmable Datapath, VHDL