Gigahertz FPGAs with New Power Saving Techniques and Decoding Logic

The availability of SiGe HBT devices has opened the door for Gigahertz FPGAs. Speeds over 5GHz have been reported. However, to make the idea practical, serious power management and new architectural features have to be included, so that they can be scaled up significantly. This paper elaborates new ideas in designing high-speed SiGe BiCMOS FPGAs. The paper explains new methods to cut down the number of current trees in the circuit. Selective tree shutdown has been used to reduce power consumption. A new decoding logic has been developed where the address and data lines are shared. These ideas have improved the performance of SiGe FPGAs. The operating frequency of the new Configurable Logic Block (CLB) is 6.8GHz.

• Type: Conference
• Year: 2002
• Where: EH
• Authors: Channakeshav, Kuan Zhou, Russell P. Kraft, John F. McDonald
• Keywords: EH 2002, Hardware, SiGe, SiGe BiCMOS FPGAs, SiGe HBT Devices