Hardware atomicity for reliable software speculation

Speculative compiler optimizations are effective in improving both single-thread performance and reducing power consumption, but their implementation introduces significant complexity, which can limit their adoption, limit their optimization scope, and negatively impact the reliability of the compilers that implement them. To eliminate much of this complexity, as well as increase the effectiveness of these optimizations, we propose that microprocessors provide architecturally-visible hardware primitives for atomic execution. These primitives provide to the compiler the ability to optimize the program’s hot path in isolation, allowing the use of nonspeculative formulations of optimization passes to perform speculative optimizations. Atomic execution guarantees that if a speculation invariant does not hold, the speculative updates are discarded, the register state is restored, and control is transferred to a nonspeculative version of the code, thereby relieving the compiler from the ...

• Type: Conference
• Year: 2007
• Where: ISCA
• Authors: Naveen Neelakantam, Ravi Rajwar, Suresh Srinivas, Uma Srinivasan, Craig B. Zilles
• Keywords: Atomic Execution, Compiler, Hardware, ISCA 2007, Speculative Compiler Optimizations