High Performance Fractional Motion Estimation and Mode Decision for H.264/AVC

We propose a high performance architecture for fractional motion estimation and Lagrange mode decision in H.264/AVC. Instead of time-consuming fractional-pixel interpolation and secondary search, our fractional motion estimator employees a mathematical model to estimate SADs at quarter-pixel position. Both computation time and memory access requirements are greatly reduced without significant quality degradation. We propose a novel cost function for mode decision that leads to much better performance than traditional low complexity method. Synthesized into a TSMC 0.13 m CMOS technology, our design takes 56k gates at 100MHz and is sufficient to process QUXGA (3200x2400) video sequences at 30 frames per second (fps). Compared with a state-of-the-art design operating under the same frequency, ours is 30% smaller and has 18 times more throughput at the expense of only 0.05db in PSNR difference.

• Type: Conference
• Year: 2006
• Where: ICMCS
• Authors: Chao-Yang Kao, Huang-Chih Kuo, Youn-Long Lin
• Keywords: Fractional Motion, Fractional Motion Estimation, ICMCS 2006, Mode Decision