Impact of modern memory subsystems on cache optimizations for stencil computations

In this work we investigate the impact of evolving memory system features, such as large on-chip caches, automatic prefetch, and the growing distance to main memory on 3D stencil computations. These calculations form the basis for a wide range of scientific applications from simple Jacobi iterations to complex multigrid and block structured adaptive PDE solvers. First we develop a simple benchmark to evaluate the effectiveness of prefetching in cache-based memory systems. Next we present a small parameterized probe and validate its use as a proxy for general stencil computations on three modern microprocessors. We then derive an analytical memory cost model for quantifying cache-blocking behavior and demonstrate its effectiveness in predicting the stencil-computation performance. Overall results demonstrate that recent trends memory system organization have reduced the efficacy of traditional cache-blocking optimizations.

• Type: Conference
• Year: 2005
• Where: ACMMSP
• Authors: Shoaib Kamil, Parry Husbands, Leonid Oliker, John Shalf, Katherine A. Yelick
• Keywords: ACMMSP 2005, Cache-based Memory Systems, Large On-chip Caches, Stencil Computations