Implementing Associative Search and Responder Resolution

In a paper presented last year at WMPP’01 [Walker01], we described the initial prototype of an associative processor implemented using field-programmable logic devices (FPLDs). That paper presented an overview of the design, and concentrated on the processor’s instruction set and its implementation using FPLDs. This paper describes the implementation of the processor’s associative operation — associative searching and responder resolution — in more detail. 1 Overview of Prototype ASC Processor Developed at Kent State, the ASC (ASsociative Computing) model [Potter92, Potter 94] of associative computing grew out of work on the STARAN and MPP computers at Goodyear Aerospace Corporation. Associative processors store one record of data in each PE, and can search for a key value across all PEs, or find the maximum value in a field across all PEs, in constant time. The initial prototype of our ASC processor [Walker01] is a byte serial associative processor consisting of a single IS...

• Type: Conference
• Year: 2002
• Where: IPPS
• Authors: Meiduo Wu, Robert A. Walker, Jerry L. Potter
• Keywords: Associative, Associative Processing Array, Associative Processor, Distributed And Parallel Computing, IPPS 2002