Incremental redundancy to reduce data retention errors in flash-based SSDs

Abstract—As the market becomes competitive, SSD manufacturers are making use of multi-bit cell flash memory such as MLC and TLC chips in their SSDs. However, these chips have lower data retention period and endurance than SLC chips. With the reduced data retention period and endurance level, retention errors occur more frequently. One solution for these retention errors is to employ strong ECC to increase error correction strength. However, employing strong ECC may result in waste of resources during the early stages of flash memory lifetime as it has high reliability and data retention errors are rare during this period. The other solution is to employ data scrubbing that periodically refreshes data by reading and then writing the data to new locations after correcting errors through ECC. Though it is a viable solution for the retention error problem, data scrubbing hurts performance and lifetime of SSDs as it incurs extra read and write requests. Targeting data retention errors, ...

• Type: Journal
• Year: 2015
• Where: MSS
• Authors: Heejin Park, Jaeho Kim, Jongmoo Choi, Donghee Lee, Sam H. Noh
• Keywords: Hardware, MSS 2015