Safety-criticalembeddedsystems having to meet real-time constraints are to be highlypredictable in order to guarantee at design time that certain timing deadlines will always be met. Thisrequirementusuallypreventsdesignersfrom utilizing cachesdue to their highly dynamic,thus hardlypredictable The integration of scratchpad memories represents analternativeapproachwhichallowsthe systemto a performancegain comparable to that of caches while at the same time maintaining predictability. In this work, we compare the impact of scratchpad memories and caches on worst case execution time (WCET) anulysis results. We show that caches,despite requiring complex techniques, can have a negative impact on thepredicted while the WCET for scratchpadmemories scales with the achievedPerformance gain at no extra analysis cost.