Intermediate Variable Encodings that Enable Multiplexor-Based Implementations of Two Operand Addition

In two operand addition, bit-wise intermediate variables such as the "propagate" and "generate" terms are defined/evaluated first. Basic carry propagation recursion is then expressed in terms of these variables and is "unrolled" to obtain a tree structure for fast execution. In CMOS VLSI technology, multiplexors are fast and efficient to implement. Hence, we investigate in this paper all possible two-bit encodings for the intermediate variables and identify the ones that enable multiplexor-based implementations. Some of these encodings enable further simplification of the multiplexor-based realizations. Our analysis also shows that adopting an intermediate signed-digit representation simply amounts to selecting one of the possible encodings. Thus, there is no inherent advantage to the use of intermediate signed-digit representations in a two operand addition. Finally, we extend our analysis to the generalized look-ahead-recursions proposed by Doran.

• Type: Conference
• Year: 1999
• Where: ARITH
• Authors: Dhananjay S. Phatak, Israel Koren
• Keywords: Applied Computing, ARITH 1999, Intermediate Signed-digit Representations, Intermediate Variables, Operand Addition