ipPROCESS: Using a Process to Teach IP-Core Development

The reusing of Intellectual Property cores has been an alternative to the increasing gap between design productivity and chip complexity of emerging System-on-chip (SoC) designs. But the design of IP-cores has its own challenges like portability, reusability, standards interfaces, welldefined and useful documentation, easy to integration and so on. All these characteristics together make the design of an IP-core a complex task and in this way teaching this discipline has became a new challenge for educators. In this paper we present an experience about how the utilization of a well-defined development process can be used to facilitate and speed-up students learning.

• Type: Conference
• Year: 2005
• Where: MSE
• Authors: Marilia Lima, Andre Aziz, Diogo José Costa Alves, Patricia Lira, Vitor Schwambach, Edna Barros
• Keywords: Chip Complexity, Hardware, Intellectual Property Cores, MSE 2005, Well-defined Development Process