Issues and Support for Dynamic Register Allocation

Abstract. Post-link and dynamic optimizations have become important to achieve program performance. A major challenge in post-link and dynamic optimizations is the acquisition of registers for inserting optimization code in the main program. It is difficult to achieve both correctness and transparency when software-only schemes for acquiring registers are used, as described in [1]. We propose an architecture feature that builds upon existing hardware for stacked register allocation on the Itanium processor. The hardware impact of this feature is minimal, while simultaneously allowing post-link and dynamic optimization systems to obtain registers for optimization in a “safe” manner, thus preserving the transparency and improving the performance of these systems.

• Type: Conference
• Year: 2006
• Where: APCSAC
• Authors: Abhinav Das, Rao Fu, Antonia Zhai, Wei-Chung Hsu
• Keywords: APCSAC 2006, Dynamic Optimization, Dynamic Optimization Systems, Optimization Code