iWISE: Inter-router Wireless Scalable Express Channels for Network-on-Chips (NoCs) Architecture

Abstract—Network-on-Chips (NoCs) paradigm is fast becoming a defacto standard for designing communication infrastructure for multicores with the dual goals of reducing power consumption while improving performance. However, research has shown that power consumption and wiring complexity will be two of the major constraints that will hinder the growth of future NoCs architecture. This has resulted in the investigation of emerging technologies and devices to alleviate the power and performance bottleneck in NoCs. In this paper, we propose iWISE, an inter-router wireless scalable express channels for NoCs architecture that minimizes the power consumption via hybrid wireless communication channels, reduces the area overhead with smaller routers and shared buffers, and improves performance by minimizing the hop count. We compared our network to leading electrical and wireless topologies such as mesh, concentrated mesh, flattened butterfly and other wireless hybrid topologies. Our simula...

• Type: Journal
• Year: 2011
• Where: HOTI
• Authors: Dominic DiTomaso, Avinash Kodi, Savas Kaya, David W. Matolak
• Keywords: Distributed And Parallel Computing, HOTI 2011, Performance Bottleneck, Synthetic Workloads, Wireless Communication Channels