Language-based control and mitigation of timing channels

We propose a new language-based approach to mitigating timing channels. In this language, well-typed programs provably leak only a bounded amount of information over time through external timing channels. By incorporating mechanisms for predictive mitigation of timing channels, this approach also permits a more expressive programming model. Timing channels arising from interaction with underlying hardware features such as instruction caches are controlled. Assumptions about the underlying hardware are explicitly formalized, supporting the design of hardware that efficiently controls timing channels. One such hardware design is modeled and used to show that timing channels can be controlled in some simple programs of real-world significance. Categories and Subject Descriptors D.2.4 [Software/Program Verification]: Formal Methods; D.4.6 [Security and protection]: Information Flow Controls General Terms Languages, Security Keywords Timing channels, mitigation, information flow

• Type: Journal
• Year: 2012
• Where: PLDI
• Authors: Danfeng Zhang, Aslan Askarov, Andrew C. Myers
• Keywords: Hardware Features, Instruction Caches, PLDI 2012, Programming Languages, Timing Channels