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Applied Computing
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PRDC 2002
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Level Oriented Formal Model for Asynchronous Circuit Verification and its Efficient Analysis Method
14 years 3 months ago
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www.async.ece.utah.edu
Tomoya Kitai, Yusuke Oguro, Tomohiro Yoneda, Eric
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Added
15 Jul 2010
Updated
15 Jul 2010
Type
Conference
Year
2002
Where
PRDC
Authors
Tomoya Kitai, Yusuke Oguro, Tomohiro Yoneda, Eric Mercer, Chris J. Myers
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Applied Computing Study Group
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