"Logic Wins!"

Abstract. Clever algorithm design is sometimes superseded by simple encodings into logic. We apply this motto to a few case studies in the formal verification of security properties. In particular, we examine confidentiality objectives in hardware circuit descriptions written in VHDL.

• Type: Conference
• Year: 2009
• Where: ASIAN
• Authors: Jean Goubault-Larrecq
• Keywords: Algorithms, ASIAN 2009, Clever Algorithm Design, Hardware Circuit Descriptions, Simple Encodings