Low-Power Twiddle Factor Unit for FFT Computation

An integral part of FFT computation are the twiddle factors, which, in software implementations, are typically stored into RAM memory implying large memory footprint and power consumption. In this paper, we propose a novel twiddle factor generator based on reduced ROM tables. The unit supports both radix-4 and mixed-radix-4/2 FFT algorithms and several transform lengths. The unit operates at a rate of one factor per clock cycle.

• Type: Conference
• Year: 2007
• Where: SAMOS
• Authors: Teemu Pitkänen, Tero Partanen, Jarmo Takala
• Keywords: Large Memory Footprint, SAMOS 2007, Twiddle Factor, Twiddle Factor Generator