Managing multi-core soft-error reliability through utility-driven cross domain optimization

As semiconductor processing technology continues to scale down, managing reliability becomes an increasingly difficult challenge in high-performance microprocessor design. Transient faults, also known as soft errors, corrupt program data at the circuit level and cause incorrect program execution and system crashes. Future processors will consist of billions of transistors organized as multi-core microarchitectures. Packaging multiple cores (and hence more transistors) onto the same die exposes more devices to soft error strikes. This paper explores utility-function-driven (benefit driven) cross domain optimization for both performance and reliability. We propose the use of utilitybased resource management for individual cores while applying utility-based shared cache partitioning across multiple cores. Moreover, we coordinate the optimization of multiple resources based on their cross domain utility information to achieve attractive performance and reliability tradeoffs. Extensive exp...

• Type: Conference
• Year: 2008
• Where: ASAP
• Authors: Wangyuan Zhang, Tao Li
• Keywords: ASAP 2008, Cross Domain Optimization, Distributed And Parallel Computing, Multiple Cores, Soft Error