Sciweavers

IEEEPACT
2008
IEEE

Meeting points: using thread criticality to adapt multicore hardware to parallel regions

14 years 7 months ago
Meeting points: using thread criticality to adapt multicore hardware to parallel regions
We present a novel mechanism, called meeting point thread characterization, to dynamically detect critical threads in a parallel region. We define the critical thread the one with the longest completion time in the parallel region. Knowing the criticality of each thread has many potential applications. In this work, we propose two applications: thread delaying for multi-core systems and thread balancing for simultaneous multi-threaded (SMT) cores. Thread delaying saves energy consumptions by running the core containing the critical thread at maximum frequency while scaling down the frequency and voltage of the cores containing non-critical threads. Thread balancing improves overall performance by giving higher priority to the critical thread in the issue queue of an SMT core. Our experiments on a detailed microprocessor simulator with the Recognition, Mining, and Synthesis applications from Intel research laboratory reveal that thread delaying can achieve energy savings up to more tha...
Qiong Cai, José González, Ryan Rakvi
Added 31 May 2010
Updated 31 May 2010
Type Conference
Year 2008
Where IEEEPACT
Authors Qiong Cai, José González, Ryan Rakvic, Grigorios Magklis, Pedro Chaparro, Antonio González
Comments (0)