Metawire: Using FPGA configuration circuitry to emulate a Network-on-Chip

While there have been many reported implementations of Networks-on-Chip (NoCs) on FPGAs, they have not seen the same acceptance as NoCs on ASICs. One reason is that communication on an FPGA is already costly due to the die resources and time delays inherent in the reconfigurable structure. Layering another general-purpose network on top of the reconfigurable network simply incurs too many performance penalties. There is, however, already a largely unused, global network available in FPGAs. As a proof-of-concept, we demonstrate that the Xilinx FPGA configuration circuitry, which is normally idle during system operation, can function as a relatively high-performance NoC. MetaWire performs transfers through an overclocked Virtex-4 Internal Configuration Access Port (ICAP) and is shown to provide a bandwidth exceeding 200 MBytes/sec.

• Type: Conference
• Year: 2008
• Where: FPL
• Authors: Matthew Shelburne, Cameron Patterson, Peter Athanas, Mark Jones, Brian Martin, Ryan Fong
• Keywords: FPGA Configuration Circuitry, FPL 2008, Hardware, Reconfigurable Network, Virtex-4 Internal Configuration