A Mixed-Signal VLSI for Real-Time Generation of Edge-Based Image Vectors

A mixed-signal image filtering VLSI has been developed aiming at real-time generation of edge-based image vectors for robust image recognition. A four-stage asynchronous median detection architecture based on analog digital mixed-signal circuits has been introduced to determine the threshold value of edge detection, the key processing parameter in vector generation. As a result, a fully seamless pipeline processing from threshold detection to edge feature map generation has been established. A prototype chip was designed in a 0.35-µm double-polysilicon three-metal-layer CMOS technology and the concept was verified by the fabricated chip. The chip generates a 64-dimension feature vector from a 64x64-pixel gray scale image every 80µsec. This is about 104 times faster than the software computation, making a real-time image recognition system feasible.

• Type: Conference
• Year: 2003
• Where: NIPS
• Authors: Masakazu Yagi, Hideo Yamasaki, Tadashi Shibata
• Keywords: Image Filtering Vlsi, Image Recognition, NIPS 2003, NIPS 2007, Robust Image Recognition