Multi-Bit Carry Chains for High-Performance Reconfigurable Fabrics

Ripple-carry architectures are the norm in today's reconfigurable fabrics. They are simple, require minimal routing, and are easily formed across arbitrary cells in a fabric. However, their computation delay grows linearly with operand width. Many different fabric carry-chains have been presented in literature offering non-linear delays, but generally require a significant investment in routing and processing area. Carry-skip chains are well-known in arithmetic logic design, and although they too possess a linear delay, their performance is 2x or more faster than simple ripple-carry schemes. They require an expanded carry chain and minimal extra logic, but offer impressive speed-ups for arithmetic. This paper presents a reconfigurable cell that supports carry-skip arithmetic using a multi-bit carry chain achieving 2

• Type: Conference
• Year: 2006
• Where: FPL
• Authors: Michael T. Frederick, Arun K. Somani
• Keywords: Carry Chain, FPL 2006, Hardware, Multi-bit Carry Chain, Require Minimal Routing