Multi-Mode Operator for SHA-2 Hash Functions

We propose an improved implementation of the SHA-2 hash family to include a multi-mode of operation with minimal latency and hardware requirements over the entire operator. The multi-mode architecture presented is able to perform either a SHA-384 or SHA-512 hash or to behave as two independent SHA-224 or SHA-256 operators. We also demonstrate that our architecture achieves performance comparable to separate implementations while requiring much less hardware. This could be useful for a server running multiple streams or in parallel PRNG generation.

• Type: Conference
• Year: 2006
• Where: ERSA
• Authors: Ryan Glabb, Laurent Imbert, Graham A. Jullien, Arnaud Tisserand, Nicolas Veyrat-Charvillon
• Keywords: Architecture Achieves Performance, ERSA 2006, ERSA 2007, Multi-mode Architecture, SHA-2 Hash Family