Multiple-Valued Dynamic Source-Coupled Logic

A new multiple-valued current-mode (MVCM) integrated circuit based on dynamic source-coupled logic (SCL) is proposed for low-power VLSI applications. The use of a precharge-evaluate logic style makes steady current flow cut off, thereby greatly saving the power dissipation. A combination of SCL and dynamic logic styles makes it possible to reduce the power dissipation while maintaining a highspeed switching capability due to small input-voltage swing with SCL. As a typical example of a high-performance arithmetic circuit, a radix-2 signed-digit adder based on the proposed dynamic SCL is implemented in a 0.18-µm CMOS technology. Its power dissipation is reduced to about 33 percent in comparison with that of the corresponding binary CMOS implementation under the normalized switching delay.

• Type: Conference
• Year: 2003
• Where: ISMVL
• Authors: Takahiro Hanyu, Akira Mochizuki, Michitaka Kameyama
• Keywords: Artificial Intelligence, Dynamic Source-coupled Logic, ISMVL 2003, Logic Styles, Power Dissipation