This discussion paper explores the problems of operating systems support when implementing concurrency controls at the level of the instruction set in processors designed for multi- and manycore chips. It introduces the SVP model and its implementation in DRISC processors to a level of detail required to understand these problems. The major contribution of the paper is in analysing the issues faced in porting operating system functionality onto such processors. The paper covers the issues of job scheduling, dynamic resource management, memory protection and security. It provides examples in
Chris R. Jesshope