Oscillation ring based interconnect test scheme for SOC

－ We propose a novel oscillation ring (OR) test architecture for testing interconnects in SoC. In addition to stuck-at and open faults, this scheme can detect delay faults and crosstalk glitches. IEEE P1500 wrapper cells are modified. An efficient ring-generation algorithm is proposed to construct ORs based on a graph model. Experimental results on MCNC benchmark circuits show the feasibility of the scheme and the effectiveness of the algorithm. Our method achieves 100% fault coverage with a small number of tests.

• Type: Conference
• Year: 2005
• Where: ASPDAC
• Authors: Katherine Shu-Min Li, Chung-Len Lee, Chauchin Su, Jwu E. Chen
• Keywords: ASPDAC 2005, Delay Faults, Efficient Ring-generation Algorithm, Hardware, IEEE P1500 Wrapper