A Parallel Branching Program Machine for Emulation of Sequential Circuits

The parallel branching program machine (PBM128) consists of 128 branching program machines (BMs) and a programmable interconnection. To represent logic functions on BMs, we use quaternary decision diagrams. To evaluate functions, we use 3-address quaternary branch instructions. We emulated many benchmark circuits on PBM128, and compared its memory size and computation time with the Intel’s Core2Duo microprocessor. PBM128 requires ap

• Type: Conference
• Year: 2009
• Where: ARC
• Authors: Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura, Yoshifumi Kawamura
• Keywords: ARC 2009, Branching Program Machines, Hardware, Parallel Branching Program, Quaternary Decision Diagrams