Parallel High-Order Integrators

In this work we discuss a class of defect correction methods which is easily adapted to create parallel time integrators for multi-core architectures and is ideally suited for developing methods which can be order adaptive in time. The method is based on Integral Deferred Correction (IDC), which was itself motivated by Spectral Deferred Correction by Dutt, Greengard and Rokhlin (BIT-2000). The method presented here is a revised formulation of explicit IDC, dubbed Revisionist IDC, which can achieve pth-order accuracy in “wall-clock time” comparable to a single forward Euler simulation on problems where the time to evaluate the right-hand side of a system of differential equations is greater than latency costs of inter-processor communication, such as in the case of the N-body problem. The key idea is to re-write the defect correction framework so that, after initial startup costs, each correction loop can be lagged behind the previous correction loop in a manner that facilitates ru...

• Type: Journal
• Year: 2010
• Where: SIAMSC
• Authors: Andrew J. Christlieb, Colin B. Macdonald, Benjamin W. Ong
• Keywords: Defect Correction, Forward Euler, Revisionist IDC, SIAMSC 2010