Phantom-BTB: a virtualized branch target buffer design

Modern processors use branch target buffers (BTBs) to predict the target address of branches such that they can fetch ahead in the instruction stream increasing concurrency and performance. Ideally, BTBs would be sufficiently large to capture the entire working set of the application and sufficiently small for fast access and practical on-chip dedicated storage. Depending on the application, these requirements are at odds. This work introduces a BTB design that accommodates large instruction footprints without dedicating expensive onchip resources. In the proposed Phantom-BTB (PBTB) design, a conventional BTB is augmented with a virtual table that collects branch target information as the application runs. The virtual table does not have fixed dedicated storage. Instead, it is transparently allocated, on demand, in the onchip caches, at cache line granularity. The entries in the virtual table are proactively prefetched and installed in the dedicated conventional BTB, thus, increasing ...

• Type: Conference
• Year: 2009
• Where: ASPLOS
• Authors: Ioana Burcea, Andreas Moshovos
• Keywords: ASPLOS 2009, BTB Design, Dedicated Conventional Btb, Programming Languages, Single-cycle Access Btb