Memory scaling is in jeopardy as charge storage and sensing mechanisms become less reliable for prevalent memory technologies, such as dynamic random access memory (DRAM). In contrast, phase change memory (PCM) relies on programmable resistances, as well as scalable current and thermal mechanisms. To deploy PCM as a DRAM alternative and to exploit its scalability, PCM must be architected to address relatively long latencies, high energy writes, and finite endurance. We propose architectural enhancements that address these limitations and make PCM competitive with DRAM.
Benjamin C. Lee, Engin Ipek, Onur Mutlu, Doug Burg