Photonic networks-on-chip: Opportunities and challenges

Abstract— As the number of processing cores that are integrated into a chip multiprocessors (CMP) continues to grow, the network-on-chip paradigm has emerged as a promising solution to address the problem of providing a robust interconnect network among them. In future high-performance CMPs, however, the high bandwidth requirements for both intrachip and off-chip communication are severely challenging the electronic communications infrastructure to meet these demands without consuming a large fraction of the overall on-chip power

• Type: Conference
• Year: 2008
• Where: ISCAS
• Authors: Michele Petracca, Keren Bergman, Luca P. Carloni
• Keywords: Electronic Communications Infrastructure, Hardware, ISCAS 2008, Overall On-chip Power, Robust Interconnect Network