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IPPS
2006
IEEE

Platform-based FPGA architecture: designing high-performance and low-power routing structure for realizing DSP applications

14 years 5 months ago
Platform-based FPGA architecture: designing high-performance and low-power routing structure for realizing DSP applications
The novel design of an efficient FPGA interconnection architecture with multiple Switch Boxes (SB) and hardwired connections for realizing data intensive applications (i.e. DSP applications), is introduced. For that purpose, after exhaustive exploration, we modify the routing architecture through efficient selection of the appropriate switch box with hardwired connections, taking into account the statistical and spatial routing restrictions of DSP applications mapped onto FPGA. More specifically, we propose a new technique for selecting the appropriate combination of switch boxes, depending on the localized performance and power consumption requirements of each specific region of FPGA architecture. In order to perform the mapping, we developed a novel algorithm, which takes into account the modified architectural routing features. This algorithm was implemented within a new tool called EX-VPR. Using a number of DSP applications, extensive comparison study of various combinations of sw...
Kostas Siozios, Konstantinos Tatas, Dimitrios Soud
Added 11 Jun 2010
Updated 11 Jun 2010
Type Conference
Year 2006
Where IPPS
Authors Kostas Siozios, Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis
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