Probabilistic arithmetic and energy efficient embedded signal processing

Probabilistic arithmetic, where the ith output bit of addition and multiplication is correct with a probability pi, is shown to be a vehicle for realizing extremely energy-efficient, embedded computing. Specifically, probabilistic adders and multipliers, realized using elements such as gates that are in turn probabilistic, are shown to form a natural basis for primitives in the signal processing (dsp) domain. In this paper, we show that probabilistic arithmetic can be used to compute the fft in an extremely energy-efficient manner, yielding energy savings of over 5.6X in the context of the widely used synthetic aperture radar (sar) application [1]. Our results are derived using novel probabilistic cmos (pcmos) technology, characterized and applied in the past to realize ultra-efficient architectures for probabilistic applications [2, 3, 4]. When applied to the dsp domain, the resulting error in the output of a probabilistic arithmetic primitive, such as an adder for example, manifests...

• Type: Conference
• Year: 2006
• Where: CASES
• Authors: Jason George, B. Marr, Bilge E. S. Akgul, Krishna V. Palem
• Keywords: CASES 2006, Probabilistic, Probabilistic Arithmetic, Probabilistic Arithmetic Primitives, System Software