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CHES
2009
Springer

Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security

14 years 12 months ago
Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security
Elliptic Curve Cryptography implementations are known to be vulnerable to various side-channel attacks and fault injection attacks, and many countermeasures have been proposed. However, selecting and integrating a set of countermeasures targeting multiple attacks into an ECC design is far from trivial. Security, performance and cost need to be considered together. In this paper, we describe a generic ECC coprocessor architecture, which is scalable and programmable. We demonstrate the coprocessor architecture with a set of countermeasures to address a collection of side-channel attacks and fault attacks. The programmable design of the coprocessor enables tradeoffs between area, speed, and security.
Xu Guo, Junfeng Fan, Patrick Schaumont, Ingrid Ver
Added 25 Nov 2009
Updated 25 Nov 2009
Type Conference
Year 2009
Where CHES
Authors Xu Guo, Junfeng Fan, Patrick Schaumont, Ingrid Verbauwhede
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