Prototyping a Residential Gateway Using Xilinx ISE

This paper presents a residential gateway (RG) prototyping process using Xilinx Integrated Software Environment (ISE) version 6.1i. The RG was designed for broadband residential multiservices based on a SONET over DWDM (Dense Wavelength Division Multiplexing) access network. The RG design was targeted for Xilinx Virtex II FPGA for prototyping purpose. The RG core design and the prototyping process using Xilinx ISE, including simulation and implementation, are discussed in this paper.

• Type: Conference
• Year: 2005
• Where: RSP
• Authors: S. W. Song, J. D. Zheng, William B. Gardner
• Keywords: Dense Wavelength Division Multiplexing, Prototyping Process, Rapid System Prototyping, RSP 2005, Xilinx Integrated Software