Race-condition-aware clock skew scheduling

The race conditions often limit the smallest feasible clock period that the optimal clock skew scheduling can achieve. Therefore, the combination of clock skew scheduling and delay insertion (for resolving the race conditions) may lead to further clock period reduction. However, the interactions between clock skew scheduling and delay insertion have not been well studied. In this paper, we provide a fresh viewpoint to look at this problem. A novel approach, called race-condition-aware (RCA) clock skew scheduling, is proposed to determine the clock skew schedule by taking the race conditions into account. Our objective is not only to optimize the clock period, but also to heuristically minimize the required inserted delay. Compared with previous work, our approach has significant improvement in the time complexity. Categories and Subject Descriptors B.6.3 [Logic Design]: Design Aids ? Optimization. General Terms Algorithms, Performance. Keywords High performance, Sequential circuits, T...

• Type: Conference
• Year: 2005
• Where: DAC
• Authors: Shih-Hsu Huang, Yow-Tyng Nieh, Feng-Pin Lu
• Keywords: Clock Skew Schedule, Clock Skew Scheduling, DAC 2005, Design Automation, Feasible Clock Period