A Real-Time Vision System Using Integrated Memory Array Processor Prototype LSI

This study reports on the performance of a Real-Time Vision System (RVS) and its use of an IMAP prototype LSI. This LSI integrates eight 8 bit processors and a 144 Kbit SRAM on a single chip. Processors operate in SIMD at 200 MIPS (25 MHz). The RVS was developed using 64 IMAP prototype LSIs connected in series in a 512 processor system configuration. Memory on the IMAP prototype LSI can be easily accessed from a host workstation through a VME bus. RVS performance is shown in real-time road-image processing and in a neural network simulation, as well as in low level image processing algorithms, such as filtering, histograms, Discrete Cosine Transform, and rotation. The RVS image processing is shown to be much faster than the video rate.

• Type: Conference
• Year: 1992
• Where: MVA
• Authors: Yoshihiro Fujita, Nobuyuki Yamashita, Shin'ichiro Okazaki
• Keywords: Imap Prototype Lsi, MVA 1992, MVA 2007, Real-time Vision System, RVS Image Processing