Reliability, adaptability and flexibility in timing: Buy a life insurance for your circuits

Abstract— At nanometer manufacturing technology nodes, process variations affect circuit performance significantly. In addition, performance deterioration of circuits due to aging effects is also increasing. Consequently, a large timing margin is required to maintain yield. To combat the pessimism and the resulting overdesign, aging analysis with highlevel models, on-chip timing margin monitoring and tuning, and flexible delay models of flip-flops can be deployed. This paper gives an overview of the state of the art of applying these techniques to improve the health of circuits.

• Type: Journal
• Year: 2016
• Where: ASPDAC
• Authors: Ulf Schlichtmann, Masanori Hashimoto, Iris Hui-Ru Jiang, Bing Li
• Keywords: ASPDAC 2016, Hardware