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ISCA
2009
IEEE

Scalable high performance main memory system using phase-change memory technology

14 years 7 months ago
Scalable high performance main memory system using phase-change memory technology
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. An alternative memory technology that uses resistance contrast in phase-change materials is being actively investigated in the circuits community. Phase Change Memory (PCM) devices offer more density relative to DRAM, and can help increase main memory capacity of future systems while remaining within the cost and power constraints. In this paper, we analyze a PCM-based hybrid main memory system using an architecture level model of PCM. We explore the trade-offs for a main memory system consisting of PCM storage coupled with a small DRAM buffer. Such an architecture has the latency benefits of DRAM and the capacity benefits of PCM. Our evaluations for a baseline system of 16-cores with 8GB DRAM show that, on average, PCM can reduce page faults by 5X and provide a speedup of 3X. As PCM is projected to have lim...
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Ju
Added 24 May 2010
Updated 24 May 2010
Type Conference
Year 2009
Where ISCA
Authors Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Jude A. Rivers
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