On Scan Chain Diagnosis for Intermittent Faults

Diagnosis is increasingly important, not only for individual analysis of failing ICs, but also for high-volume test response analysis which enables yield and test improvement. Scan chain defects constitute a significant fraction of the overall digital defect universe, and hence it is well justified that scan chain diagnosis has received increasing research attention in recent years. In this paper, we address the problem of scan chain diagnosis for intermittent faults. We show that the conventional scan chain test pattern is likely to miss an intermittent fault, or inaccurately diagnose it. We propose an improved scan chain test pattern which we show to be effective. Subsequently, we demonstrate that the conventional bound calculation algorithm is likely to produce wrong results in the case of an intermittent fault. We propose a new lowerbound calculation method which does generate correct and tight bounds, even for an intermittence probability as low as 10%.

• Type: Conference
• Year: 2009
• Where: ATS
• Authors: Dan Adolfsson, Joanna Siew, Erik Jan Marinissen, Erik Larsson
• Keywords: ATS 2009, Hardware, Scan Chain, Scan Chain Diagnosis, Scan Chain Test