Self-optimization of Performance-per-Watt for Interleaved Memory Systems

- With the increased complexity of platforms coupled with data centers’ servers sprawl, power consumption is reaching unsustainable limits. Memory is an important target for platform-level energy efficiency, where most power management techniques use multiple power state DRAM devices to transition them to low-power states when they are “sufficiently” idle. However, fully-interleaved memory in highperformance servers presents a research challenge to the memory power management problem. Due to data striping across all memory modules, memory accesses are distributed in a manner that considerably reduces the idleness of memory modules to warrant transitions to low-power states. In this paper we introduce a novel technique for dynamic memory interleaving that is adaptive to incoming workload in a manner that reduces memory energy consumption while maintaining the performance at an acceptable level. We use optimization theory to formulate and solve the powerperformance management probl...

• Type: Conference
• Year: 2007
• Where: HIPC
• Authors: Bithika Khargharia, Salim Hariri, Mazin S. Yousif
• Keywords: Distributed And Parallel Computing, HIPC 2007, Low-power States, Memory Modules, Memory Power Management