Shared vs. Snoop: Evaluation of Cache Structure for Single-Chip Multiprocessors

The shared cache structures and snoop cache structures for single-chip multiprocessors are evaluated and compared using an instruction level simulator. Simulation results show that 1-port large shared cache achieves the best performance if there is no delay penalty for arbitration and accessing the bus. However, if 1-clock delay is assumed for accessing the shared cache, a snoop cache with internal wide bus and invalidate style NewKeio protocol overcomes shared caches.

• Type: Conference
• Year: 1997
• Where: EUROPAR
• Authors: Toru Kisuki, Masaki Wakabayashi, Junji Yamamoto, Keisuke Inoue, Hideharu Amano
• Keywords: Cache Structures, Distributed And Parallel Computing, EUROPAR 1997, Large Shared Cache, Snoop Cache