We have developed two novel methods of fabricating very small Si single-electron transistors (SETs), called PAtternDependent OXidation (PADOX) and Vertical PAttern-Dependent OXidation (V-PADOX). These methods exploit special phenomena that occur when small Si structures on SiO2 are thermally oxidized. Since the size of the resultant Si island of the SET is about 10 nm, we can observe the conductance oscillations in the SET even at room temperature. The controllability and reproducibility of these methods are excellent because of the stability of the thermal oxidation process. We are using PADOX and V-PADOX to integrate singleelectron devices (SEDs) for sophisticated functions. We have fabricated and tested several kinds of memory and logic devices. This paper also describes applications of multi-input gate SETs to multiple-valued logic circuits.