Simultaneous Shield and Buffer Insertion for Crosstalk Noise Reduction in Global Routing

We present a method for incorporating crosstalk reduction criteria into global routing under an innovative power supply architecture, while considering the constraints imposed by limited routing and buffering resources. An iterative procedure is employed to route the signal wires, assign supply shields, and insert buffers so that both buffer/routing capacity and signal integrity goals are met. In each iteration, shield assignment and buffer insertion are considered simultaneously via a dynamic programming-like approach. Our noise calculations are based on Devgan’s noise metric, and our work shows, for the first time, that this metric shows good fidelity on average. Experimental results on testcases with up to about 10,000 nets point towards an asymptotic run time that increases linearly with the number of nets. Our algorithm achieves noise reduction improvements of up to 53% and 28%, respectively, compared to methods considering only buffer insertion, or only shield insertion afte...

• Type: Conference
• Year: 2004
• Where: ICCD
• Authors: Tianpei Zhang, Sachin S. Sapatnekar
• Keywords: Crosstalk Reduction Criteria, Hardware, ICCD 2004, Noise Reduction Improvements, Signal Integrity Goals