SMAP: Heterogeneous Technology Mapping for Area Reduction in FPGAs with Embedded Memory Arrays

It has become clear that large embedded con gurable memory arrays will be essential in future FPGAs. Embedded arrays provide high-density high-speed implementations of the storage parts of circuits. Unfortunately, they require the FPGA vendor to partition the device into memory and logic resources at manufacture-time. This leads to a waste of chip area for customers that do not use all of the storage provided. This chip area need not be wasted, and can in fact be used very e ciently, if the arrays are con gured as large multi-output ROMs, and used to implement logic. In order to e ciently use the embedded arrays in this way, a technology mapping algorithm that identi es parts of circuits that can be e ciently mapped to an embedded array is required. In this paper, we describe such an algorithm. The new tool, called SMAP, packs as much circuit information as possible into the available memory arrays, and maps the rest of the circuit into four-input lookup-tables. On a set of 29 sequent...

• Type: Conference
• Year: 1998
• Where: FPGA
• Authors: Steven J. E. Wilton
• Keywords: Embedded Array, FPGA, FPGA 1998, Gurable Memory Arrays, Memory Array